![](https://infosec.pub/pictrs/image/0b420a0f-339d-4572-a0a3-70d358a898cb.png)
![](https://beehaw.org/pictrs/image/c0e83ceb-b7e5-41b4-9b76-bfd152dd8d00.png)
Amen. I’d love to see Home Assistant start using it. I’m not holding out hope, though, because the guy behind Home Assistant is actively hostile.
Plutus, Haskell, Nix, Purescript, Swift/Kotlin. laser-focused on FP: formality, purity, and totality; repulsed by pragmatic, unsafe, “move fast and break things” approaches
AC24 1DE5 AE92 3B37 E584 02BA AAF9 795E 393B 4DA0
Amen. I’d love to see Home Assistant start using it. I’m not holding out hope, though, because the guy behind Home Assistant is actively hostile.
RISC-V is an open instruction set, which should be what the Pi foundation (if their open source mission is to be taken at face value) would be switching to if they weren’t just a way for Broadcom to push their chips on the maker community under the guise of open source.
RISC-V, an open-source instruction set architecture (ISA), has been making waves in the world of computer architecture. “RISC-V” stands for Reduced Instruction Set Computing (RISC) and the “V” represents the fifth version of the RISC architecture. Unlike proprietary architectures such as ARM and x86, RISC-V is an open standard, allowing anyone to implement it without the need for licensing fees. This openness has led to a surge in interest and adoption across various industries, making RISC-V a key player in the evolving landscape of computing. At its core, an instruction set architecture defines the interface between software and hardware, dictating how a processor executes instructions. RISC-V follows the principles of RISC, emphasizing simplicity and efficiency in instruction execution. This simplicity facilitates easier chip design, reduces complexity, and allows for more straightforward optimization of hardware and software interactions. This stands in contrast to Complex Instruction Set Computing (CISC) architectures, which have more elaborate and versatile instructions, often resulting in more complex hardware designs. The open nature of RISC-V is one of its most significant strengths. The ISA is maintained by the RISC-V Foundation, a non-profit organization that oversees its development and evolution. The RISC-V Foundation owns, maintains, and publishes the RISC-V Instruction Set Architecture (ISA), an open standard for processor design. The RISC-V Foundation was founded in 2015 and comprises more than 200 members from various sectors of the industry and academia.
They’ve been declining for years. It’s time the community ditched them for RISC-V machines.
Who the fuck cares?
Why are we seeing this ad?
I’d definitely be interested.
I did something like this a while back when I attempted to create an official Cardano dev/Stake Pool operator machine. I ended up realizing that a whole config is too personal to try an standardize but parts of my shared configs DID help other Cardano devs and Stake pool operators get a rock-solid Cardano dev/SPO setup that could be cloned into a myraid of different types of machines and configs.
the most mainstream one for the moment.
It’s a ghost town (much like this comment thread). ;)
Being an early adopter can be boring sometimes.
Try NixOS. It eliminates that ISO centric paradigm and trades it for one config file that defines everything and builds it from scratch.
Holy shit! This is awesome. I’ve been looking for something like this for YEARS!
@bweaking@nuwus.org
Aha. Thanks for making the distinction for me.
Wait. Capitalism isn’t silicon serfdom?
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Much like the fediverse, we’re very early on that technology. We’re waiting for the network effect to take hold in both areas. Once it does, things will improve significantly, IMO.